30732393-001
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GPCI Driver/Receiver
The GPCI contains three 16-bit registers, Data Hiway drivers and detectors, a bit counter, a 26-bit shift reQister, and state generation and error detecting hardware. Operation of the GPCI revolves around
loading and unloading the three registers to perform different functions. The registers are R(O), R(1), and R(2)status/ output control, address and data,
respectively. They perform write, read, direct input, and Hiway swap operations. Data loaded into R(O) selects the operation to be performed. The GPCI alerts the computer when an operation has completed. GPCI status information is available to the computer in R(O). The GPCI Bus contains 16 bidirectional data lines, 1 bidirectional parity line, and associated control lines.